Toshiba Corp. has produced the first functional test chip which conforms to a new integrated-circuit architecture called X, which includes interconnects using diagonal pathways as well as the ...

Agere Systems and Cadence Design Systems announced that Agere has completed design and implementation on a next-generation, 90-nanometer, mobile handset chipset using the Cadence X Architecture and ...

Yesterday, developer of PS3 emulator RPCS3 Whatcookie posted a 20-minute YouTube video to their YouTube channel in defense of AVX-512, a maligned CPU instruction set that debuted with Intel's ...

A semiconductor approach from Simplex Solutions (Sunnyvale, CA) and Toshiba (Tokyo, Japan) promises to improve chip performance by 10%, reduce power consumption by 20%, and build 30% more chips on a ...